1. Field of the Invention
The present invention relates to a sheet-like board member and a method of manufacturing a semiconductor device and, more particularly, to solution of various problems inherent to a known hybrid IC.
2. Description of the Related Art
Since a circuit device to be mounted on an electronic appliance has conventionally been adopted by a portable cellular phone or a portable computer, demand exists for realization of a more compact circuit device of lower profile and lighter weight.
A hybrid IC has frequently been used as a circuit device. A ceramic board, a metal board, a printed board, or a flexible sheet board has predominantly been employed as a board for use with the hybrid IC.
FIG. 17 shows an example board for use with a hybrid IC. The structure of the board will be specifically described hereinbelow. A conductive pattern is formed from Cu on a board 1. The conductive pattern is a wiring 6 which is integrally formed with die pads 2, bonding pads 3, outer lead electrodes 4, and pads 5 on which passive elements 9, such as chip resistors or chip capacitors, are mounted. The wiring 6 is patterned into a desired geometry in accordance with the circuit of the hybrid IC.
A semiconductor element 7 is mounted on the die pad 2, and bonding electrodes provided on the semiconductor element 7 are electrically connected to the corresponding bonding pads 3 by using bonding wires 8. The passive element is mounted on each of the pads 5, by means of brazing material such as solder or Ag paste. An external lead 10 is fixedly connected to each of the outer lead electrodes 4 through use of brazing material or Ag paste. In consideration of environmental resistance, the hybrid IC is sealed by molding. More specifically, insulating resin 11 is formed over the entire surface of the board 1 through molding.
In another case, a hybrid IC is embodied through use of a lead frame 20. FIGS. 18A and 18B show an embodiment of the hybrid IC shown in FIG. 17 which is realized through use of the lead frame 20.
A semiconductor element 22 is mounted on an island 21, and bonding pads 23 provided in the vicinity of the island 21 are electrically connected to the semiconductor element 22 by using bonding wires 24.
Of the bonding pads 23, some bonding pads 23 may be integrally formed with a wiring 25. For example, one or more of the bonding pads 23 is electrically connected to a lead terminal 26. A plurality of lead terminals 26 are provided on the side of the lead frame 20. Reference numeral 27 designates a passive element, and reference numeral 28 designates a die pad on which the passive element 27 is mounted.
Since the hybrid IC shown in FIG. 17 employs the board 1, the thickness and weight of the hybrid IC are increased by the amounts corresponding to the board 1. Further, a limitation is imposed on a reduction in costs. Particularly, at the time of formation of conductive patterns 2 through 6 formed from Cu foil on the board 1, the manufacturing process is additionally provided a step of patterning the board 1 after adhesion of a Cu foil to the board 1. The board 1 having a Cu pattern formed thereon adds to the cost of a hybrid IC. Further, the board 1 is utilized as a support board for forming conductive patterns 2 through 6, and hence the board 1 is necessary.
Use of a board poses a problem in connection with the dissipation of heat from a semiconductor element or passive element mounted on the board. For example, a printed board, a ceramic board, and a flexible sheet are formed from insulating material. Even when an attempt is made to dissipate heat to a substrate by using a board, the heat developing in a sealed semiconductor element or passive element cannot be dissipated well to the outside, because of poor thermal conductivity of the board. Even in the case of a metal board having superior heat dissipation properties, the surface of the metal board is coated with insulating plastic in order to prevent occurrence of an electrical short circuit between conductive patterns and the metal board. The plastic coating induces thermal resistance. If the temperature of a semiconductor element is lowered, the drive performance of the semiconductor element can be improved further. In spite of this fact, the performance of a semiconductor element cannot be sufficiently utilized because of poor dissipation properties of the board.
In contrast with a packaged discrete element or packaged semiconductor chip, a hybrid IC is equipped with many active and passive elements. Further, wirings for electrically interconnecting semiconductor elements are used in great numbers. Depending on the number of elements to be mounted on a board, the board is large, and very long wirings are laid on the board. Therefore, deformation of a board, such as warpage of a board, must be taken into consideration. Even if miniaturization of a conductive pattern is achieved in accordance with a tendency toward a smaller and thinner pattern of lighter weight, a support board is required for supporting narrow and long wirings without involvement of deformation such as warpage.
Consideration is given to manufacturing processes. Data pertaining to a certain pattern are transmitted to a board manufacturer from a hybrid IC manufacturer. The board manufacturer manufactures a board by means of forming the pattern on a board. The hybrid IC manufacturer purchases the thus-finished board. Thus, a great amount of time is consumed before manufacture of a hybrid IC. Accordingly, the hybrid IC manufacturer cannot supply hybrid ICs to a user within a short period of time.
In addition to the problem described in connection with FIG. 17, the hybrid IC employing the lead frame 20 shown in FIG. 18 encounters the following problems.
Since the lead frame 20 is formed by means of selectively removing material from front to back through use of the pressing technique, or through use of the etching technique, measures are taken in order to prevent lead terminals 26 and an island 21 from coming apart. More specifically, the lead terminals 26 are provided with a tie bar 29, and the island 21 is provided with suspension leads 30. The tie bar 29 and the suspension leads 30 are not originally required. Hence, there is additionally required a step of removing the tie bar 29 and the suspension leads 30 after molding of the hybrid IC.
Since a wiring 25 is laid narrowly and lengthy, the wiring 25 also requires suspension leads 31 in order to prevent deformation of the wiring 25, such as warpage. Accordingly, as mentioned previously, there is additionally required a step of removing the suspension leads 31. Further, presence of the suspension leads 30 and 31 hinders formation of other wirings, pads, or islands. Particularly, in order to prevent occurrence of intersection between wirings, a complicated pattern is required.
Since the lead frame 20 is selectively removed from front to back so as to have a predetermined pattern by means of etching or pressing, a limitation is imposed on miniaturization of a lead pattern. This also applies to the conductive pattern shown in FIG. 17.
In a case where the lead frame 20 is formed by means of, for example, pressing, a pitch between leads to be punched is said to be limited to a width substantially equal to the thickness of the lead frame 20. In a case where the lead frame 20 is formed by means of etching, the lead frame 20 is etched to a depth corresponding to the thickness of the lead frame 20, in both the longitudinal and lateral directions. Therefore, the pitch between leads is said to be limited to the thickness of the lead frame 20.
When an attempt is made to miniaturize the pattern of the lead frame 20, the thickness thereof must be reduced. If the thickness of the lead frame 20 itself is reduced, the strength of the lead frame 20 is also reduced, which may in turn cause problems such as warpage of the lead frame 20 or deformation and misregistration of the lead terminals 26. Particularly, since the end of each of bonding pads 23 to be connected to a fine metal wiring 24 is unsupported, the end of the bonding pad 23 may be susceptible to warpage or deformation.
Further, arrows shown in FIG. 18A designate areas from which lead terminals 26 protrude from the side surfaces of a semiconductor package, and an upper metal mold 32 cannot be brought into contact with a lower metal mold 33 within a space defined between the lead terminals 26. This may cause generation of burrs in these areas.
As mentioned above, miniaturization of the lead frame 20 encounters limitation, thereby hindering further miniaturization of the overall semiconductor package. From the viewpoint of processes, there may be required a method of preventing warpage of the lead frame 20, a step of removing burrs, and a necessity of removing the suspension leads 7 and the tie bar 8, thereby complicating manufacturing processes. Further in a step of removing a tie bar 8, leads are easy to be bent or drawn out from the package. Therefore reliability is apt to be lowered.